物联网开发习题集,c,c++

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Computer Architecture 2022-23

Assessed Exercise 2

Processor Circuit

Introduction

The purpose of this exercise is to learn in detail how a processor works: how a

digital circuit can execute instructions and run programs. The exercise requires

you to understand a working circuit called M1 that implements the Sigma16

architecture, and then to work out how to modify it.

Part 1. Implementing a new instruction: loadxi

Add a new instruction loadxi to the M1 circuit for the Sigma16 architecture.

Modify the datapath and control, as needed, in order to implement the new

instruction in the M1 circuit, and modify the simulation driver so the operation

of the instruction can be observed. Demonstrate the execution of the instruction

using a machine language test program.

The new instruction is load with automatic index increment (the loadxi

instruction). Its format is RX: there are two words; the ﬁrst word has a 4-bit

opcode f, a 4-bit destination register (the d ﬁeld), a 4-bit index register (the sa

ﬁeld), and a 4-bit secondary opcode of f (the sb ﬁeld). As with all RX instruc-

tions, the second word is a 16-bit constant called the displacement. In assembly

language the instruction is written, for example, as loadxi R1,$12ab[R2].

The eﬀect of executing the instruction is to perform a load, and also to incre-

ment the index register automatically. The eﬀective address is calculated using

the old value of the index register (i.e. the value before it was incremented).

Thus the instruction loadxi R1,$12ab[R2] performs R1 := mem[12ab+R2], R2

:= R2+1.

(Historical note: many real computers have this instruction. The idea is

that computers spend a lot of time iterating over arrays, and in each iteration

you need to load x[i] into a register and also increment i. The loadxi instruction

lets you do this work in one instruction rather than two.)

Test your new instruction using a machine language program that calculates

the sum of the elements of an array X, which contains n elements (this program

is one of the unassessed exercises, and you may use the model solution). To

do this, start with a program that simply calculates the sum using an ordinary

iteration, with an index i that goes from 0 to n − 1. Then change the program

by replacing the load instruction for x[i] by a loadxi instruction, and getting rid

of the explicit add instruction to increment i. Run the modiﬁed program on the

circuit, and verify that it gets the correct result.

If you simply remove the add instruction that increments i from the model

solution, the subsequent memory addresses will shift down, which is inconvenient

for comparing the execution of the two versions of the program. Instead of

deleting the instruction, just replace it with something like add R0,R0,R0 which

won’t do anything and will leave all the instructions and data values with the

same address as before.

Part 2. Implementing logic instructions

The M1 circuit implements several RRR instructions, but it leaves the RRR

instructions with opcodes 5, 6, 7, 8 as unimplemented. Modify M1 to implement

the following new RRR instructions. These are “bitwise logic” instructions: bit

i in the result depends on bit i in the operands.

• inv R1,R2. Opcode 5. Meaning is R1 := inv R2

• and R1,R2,R3. Opcode 6. Meaning is R1 := R2 AND R3.

• or R1,R2,R3. Opcode 7. Meaning is R1 := R2 OR R3.

• xor R1,R2,R3. Opcode 8. Meaning is R1 := R2 XOR R3.

Note that you are implementing these machine language instructions in the

M1 circuit, but the assembler in the Sigma16 emulator doesn’t know about them.

You can generate these new instructions in an assembly language program by

writing out the machine language in a data statement. For example:

data $5120 ; inv R1,R2

data $83c5 ; xor R3,R12,R5

Remember that the M1 circuit implements only the Core Sigma16 instruc-

tion set, but the full Sigma16 has additional instructions, including some logic

instructions which are diﬀerent from the ones described here. Warning: do not

use Sigma16 logic instructions in your test program!

Here is a test program TestLogic.asm.txt for your modiﬁed circuit:

; Test the new logic instructions for Assessed Exercise

; Test data

lea R1,$0003[R0] ; R1 := 0003

lea R2,$0005[R0] ; R2 := 0005

; Logic instructions

data $5312 ; inv R3,R1 R3 := fffc

data $6412 ; and R4,R1,R2 R4 := 0001

data $7512 ; or R5,R1,R2 R5 := 0007

data $8612 ; xor R6,R1,R2 R6 := 0006

trap R0,R0,R0 ; terminate

; Expected results (use regs command after running circuit)

; R1 = 0003

; R2 = 0005

; R3 = fffc

; R4 = 0001

; R5 = 0007

; R6 = 0006

Here is the object code TestLogic.obj.txt:

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